The ρ-VEX processor design has been used as a teaching tool in several courses and labs. The course names and codes are listed below. We have prepared tutorials and instruction and lab manuals for this purpose and can make them available upon request. We utilize modern FPGA platforms, e.g., ML-605, in the labs. In case you are interested in using the ρ-VEX processor for your own courses/labs, feel free to contact Stephan Wong (J.S.S.M.Wong@tudelft.nl).
- An extensive tutorial for the 2.x release that explains how to compile code, simulate the design, and synthesize the design for a modern FPGA platform, i.e., the ML-605.
- ET4 074 “Modern Computer Architecture” – in this course, students were given a mixed workload that they need to execute on a heterogeneous computing platform that includes and SoC containing the ρ-VEX processor.
- ET4 370 “Reconfigurable Computer Design” – in this course, students start with the basic ρ-VEX processor design and have to attach to it reconfigurable accelerators for a certain set of applications.